밴드갭 레퍼런스 제너레이터 회로 설계 및 구현

### 트랜지스터 레벨 밴드갭 레퍼런스 제너레이터 회로 설계
* 🔌 밴드갭 레퍼런스 회로는 올바른 작동을 위해 **최소 1.4~1.5V의 공급 전압**이 필요하며, 일반적인 공급 전압은 **1.8V**입니다.
* ⚙ 이 회로에는 **다이오드와 더 큰 다이오드와 저항이 있는 두 가지 분기**와 이러한 분기의 전압을 균등화하는 **증폭기**가 있습니다.
* 🔋 앰프의 입력 공통 모드 범위는 매우 중요하며, **최악의 조건에서 마진이 더 높은 PMOS 입력 쌍**이 선호됩니다.
* 🔊 이 회로에는 밴드갭 레퍼런스 설계의 일반적인 기술인 **밴드갭 자체에서 전류를 유도하는 증폭기**가 있습니다.
* 🎛 부하 장치는 전류 미러를 사용하여 구현할 수 있으며, **증폭기의 출력 공통 모드 제한**으로 인해 두 번째 단계가 **레벨 변환기 역할**을 합니다.
* 📊 안정성과 주파수 보정은 핵심 고려 사항이며, **회로에 간단한 도미넌트 극 보정**이 추가됩니다.
* 🚀 일반적으로 **수백 나노암페어에서 수 마이크로암페어**를 생성하는 시동 회로는 밴드갭 회로를 시작하는 데 매우 중요합니다.
* 🔒 스타트업 회로에는 밴드갭 회로가 성공적으로 시작되면 일반적으로 **밴드갭 전류와 기준 전류를 비교하여 전류 덤핑을 중지하는 메커니즘**이 포함되어 있습니다.

밴드갭 레퍼런스 생성기는 안정적인 작동과 효과적인 시동을 보장하기 위해 세심한 설계가 필요합니다.

Hey guys, in the last few videos, we have looked at different concepts related to band gap reference generator circuits. In this video, we will consider some transistor-level implementations complete with amplifier and startup circuit. Let's start with the branch which will generate our final output. So, we already know that V_PET voltage will appear across resistor R4, and the V_SEAT voltage would appear across diode D3, and the current in this branch would be a V_PET current. And we would require a V_PET current source in the form of a PMOS transistor on the top of reference voltage. Now, from this branch, we can calculate the minimum supply voltage required for correct operation. A typical bandgap reference voltage is 1.25 volts, and we would require a few hundred millivolts across the transistor to keep it in saturation. So, in total, we will require 1.4 to 1.5 volts of supply for this circuit to operate correctly. So, let's assume our typical supply to be 1.8 volts with some variations around it.

so this is a very commonly used analog supply range for large imagery process nodes. Now let's insert the core of the band gap. So we have two branches here, one containing only a diode and the other containing a larger diode and a resistor. And we know if we make V N and V P equal, then the current flowing in these two branches will be P tat. And in order to make these two voltages equal, we need to now insert an amplifier. Now there are two flavors of amplifiers available depending on the type of the input transistors. So we can either have P Mo's input tester or so-called PDF or n MOS input raster or so-called. And if now there are many factors deciding which kind of dip pair should be used, and one of the most important is input common mode range. Input voltage in this case is C, that voltage across diode. Let's assume diode voltage at room temperature to be around 700 millivolts and see Ted slow to be minus 2 milli volt per degree Celsius. So now we can calculate the

diode voltage whole range of temperature. So, we have amplifier input voltage ranging from around 850 millivolts to 450 millivolts. Now, lower input voltage is better for PMAs because it has more margin, and higher input voltage is better for AMAs. So, worst-case condition for PMAs would be 850 millivolts, and for AMAs would be 450 millivolts. So, now let's see how much margin these two display have at their respective worst-case conditions. So, we see that even if we consider the worst-case supply of 1.62 volts, the margin that PMAs has is 770 millivolts, which is considerably higher than worst-case AMAs margin, which is 450 millivolts. And that is precisely the reason that most of the conventional bandgap circuit used PDF as the input pair. So, let us also stick with PDF. So, in this implementation, we are passing the amplifier by the P that current of band gap itself, and it is a very common

technique, although by no means the only technique now coming to load devices, we have a few options available here as well. We can use a current mirror as a load stage, or we can go for more advanced options like folded cascode. Both options are used frequently in practical design. Let's stick to the current mirror in this video purely because of its simplicity. So, here is our amplifier, but because of the output common mode limitation of this amplifier, we cannot simply connect its output directly to the Pima stages. So, we need another stage in between. So, here is our second stage. Now, notice that the second stage is not actually a gain stage because the load device is a low impedance diode connected transistor. So, this is more of a level converting stage. Next, knowledge snake stability and frequency compensation. So, how many poles are there in this circuit? So, if we attach one pole to one node in the signal path, there are four poles. Notice that I am ignoring the pole at the V end node. There are two reasons for it. First reason is that in normal mode

diode offers a very low impedance, so we can assume VN to be Kelly constant. The second reason is that this vnode comes in the positive feedback loop, while in a normal mode, it is a negative feedback, which will dominate over positive feedback. Coming back to our four pools, the second and fourth Pole would be high-frequency pool, and this is because of the presence of low impedance. They're connected transistors. Note one is the high impedance node, so this pole will be a low-frequency Pole. Ignoring the diode impedance again, that third pole will be decided by the value of r1. Typical value of r1 is few tens to few hundreds of kilo ohms, so in its higher limit, it will just start to deteriorate the phase margin of the system. So one can rightly argue that we don't need a compensation here because it is effectively a single pole system. There is only one dominant pole, but better safe than sorry. Let's anyway put a simple dominant pole compensation here and to complete the

circuit. Let's also indicate the condition at the input of the amplifier. Okay, so now we have put the core of the circuit in place. The only remaining piece in the puzzle is startup. So we know that in order to start the circuit, we need to insert current at appropriate nodes. So let's first consider how to generate that startup current itself. Startup current need not be very accurate, but it must guarantee the current generation, that is, it's all startup. We have seen once a circuit in the beginning of theta 3, that video. It is a diode-connected transfer followed by a resistance. The circuit will carry current as soon as there is a voltage drop across this resistor. This condition is met as soon as the supply voltage is higher than the threshold voltage of this transistor. So this is a very simple and reliable way of generating current at even very small supply voltages. Current in this branch is approximately given by this equation, which is VDD minus VG's of this transfer divided by the resistance value. So we can control this current by controlling DISA distance. Now sutter

current is usually a few hundred nanoamperes to a few microamperes. So, in order to achieve that level of current, the resistance needs to be very big. For example, if we assume one microampere of startup current and 0.8 volts across the transistor, then for typical supply voltage, this ratio needs to be one megaohm. So, it's not unusual to have several megaohms of resistance in this branch. Now, a big laser can have a significant area penalty. So, in many area-sensitive designs, this resistance is implemented by the means of transistors. One common way is to connect several long-channel and merged devices in series, and their gate is connected to the supply. In other words, it's always on weak and mas. The disadvantage of this scheme is larger PVT variation in startup current. So, keeping this in mind, let's proceed with the distance in this video. The next logical question is where to insert the current. We want positive feedback to dominate in the beginning, so we can insert current into the VN node. But since the amplifier derives the

current from the bandgap itself. We also want these FEMA says to carry the current. So, one way of doing this is to insert the current into this node, but an equally valid way of inserting the current into these P masses is to take out the current from this node but insert the current into this node. As a matter of fact, in principle, all of these techniques can be designed to work, but most of these nodes will result in excessive peaking in the output voltage. This is because even if we insert current in these branches, the amplifier will wake up by its own time constant, which is determined by its dominant pole compensation. In fact, the smoothest possible startup is achieved by inserting the current into this compensation capacitor. So, in other words, waking up your slowest node first is the best policy here. So, we mirror the current and dump this current into the capacitor. The next step is to stop this dumping when the circuit has successfully started. The most common way is to sense the current in the bandgap circuit and stop when the current is big enough. So,

this is one way of doing it. So, this branch is comparing the static current with band gap current. When there is no current in the band gap, this node is pulled by the startup current, and the inverter output is zero. Hence, this PMO's is on. When sufficient current builds up in the bandgap, the load is pulled low, and the current dumping is stopped. So, this scheme also puts an upper limit to the startup current across all PV T corners. The startup current must always be less than the final bandgap current. A commonly used value of maximum ratio of bandgap current to static current is 4 to 5. In other words, the maximum startup current at a given PV T corner should be 4 to 5 times less than the bandgap current. Now, one may be tempted to turn off the starter current generation branch as well along with this branch to save the power, but I must caution against it. It should never be done. If it is done, then it may result in a stuck state in the circuit. In that stuck state

the bandgap circuit is still not on, but the startup circuit has turned off, so we see that the startup circuit consumes currents in these two branches, which is always present. This may be a big issue in low-power circuits, but if low power is absolutely critical and you can trade some accuracy for the power, then there is another way. Remember we said that we can start the circuit by inserting the current into this branch. So, if we replace this transfer by a register, then this resistor would act as a startup circuit. As the supply ramps up, this register forces this amplifier node to go up as well, and this would force current in the two branches of the amplifier. This current would eventually force current into these two diode branches, and this will cause the circuit to start up. But now, because of this resistance, the power supply and common mode rejection of this amplifier will not be very good. Also, the basket of amplifiers will change with the supply, which will change its GM with the supply. This variation will cause any crises in the final bandgap output voltage, but for ultra-low power

application. This technique can be considered. Also, notice that this technique works only for the p-type differential input pair. As a last step, let's consider some options we have in the output generation stage. We know that we can generate the output voltage in these two branches as well using these stages. Will obviously save the area and power that we spent in this final branch. So, is there any advantage of using this dedicated reference branch at all? In fact, there is an advantage. Notice that this reference branch is out of the feedback loop, so any change in the output capacitance does not change the stability of the system. Now, this can be a crucial factor if you are not sure about your output capacitance value. Now, let's say we know our output capacitance value rather well and we are interested in selling some area and power. So, we can get rid of this final branch. Now, we have two options in hand. Is there any preference there? In fact, there is. Recall that for start-up, we want V EndNote to come up quickly, so we

would like to avoid any delay in this branch, and for that reason, they will tab the output from the other branch. Actually, there is another option available; there are subtle advantages in shorting these two nodes out. So, in this case, only one node is available, right? So, in this video, we have considered a transfer level schematic of a bandgap reference generator, except for the fact that a real practical circuit does not often use the diodes; they use BJTs. So, we will take BJTs in our next video. For this video, post your comments below, and thanks for watching.

#26 Band-gap Reference Circuits - Circuit Implementation

Analog Snippets

트랜지스터 레벨의 대역 갭 레퍼런스 제너레이터 구현

이 동영상에서는 출력 분기와 필요한 공급 전압에 초점을 맞춰 밴드 갭 레퍼런스 제너레이터 회로의 트랜지스터 레벨 구현에 대해 설명합니다.

일반적인 밴드갭 레퍼런스 전압은 1.

25V이므로 제대로 작동하려면 1.

이 동영상에서는 입력 트랜지스터에 다양한 증폭기 유형을 사용하는 방법도 살펴보고, 입력 전압 마진 측면에서 NMOS에 비해 PMOS의 장점을 강조합니다.

증폭기를 위한 부하 기술 및 회로 설계

전류 미러와 폴드 캐스코드는 앰프의 일반적인 부하 스테이지 옵션이며, 단순성 때문에 전류 미러가 선택됩니다.

앰프의 출력 공통 모드 제한으로 인해 피마 스테이지에 직접 연결할 수 없기 때문에 레벨 변환을 위해 두 번째 스테이지가 추가됩니다.

회로에는 4개의 극이 있으며 두 번째와 네 번째 극은 임피던스가 낮은 트랜지스터로 인해 고주파이며 안정성을 위해 지배 극 보상이 추가되었습니다.

트랜지스터에서 시동 전류 달성하기

트랜지스터의 스타트업 전류는 일반적으로 마이크로암페어 범위이므로 높은 저항 값(종종 메가옴 범위)이 필요합니다.

면적에 민감한 설계에서는 이 저항을 구현하기 위해 트랜지스터를 직렬로 사용할 수 있지만, 이로 인해 스타트업 전류의 변동이 커질 수 있습니다.

가장 원활한 시작은 보상 커패시터에 전류를 삽입하여 가장 느린 노드를 먼저 깨우고 회로가 성공적으로 시작되면 전류 덤핑을 중지함으로써 달성할 수 있습니다.

브랜치는 정전류와 밴드갭 전류를 비교하여 스타트업 전류를 사용하여 노드를 낮게 끌어내리고 PMO를 켭니다.

스타트업 전류는 회로의 고착 상태를 방지하기 위해 밴드갭 전류의 4~5배 이하로 제한됩니다.

저항을 사용하는 다른 스타트업 방법은 정확도와 전력을 맞바꿀 수 있지만 증폭기의 공통 모드 제거 및 출력 전압에 변동이 발생할 수 있습니다.

밴드갭 레퍼런스 생성기의 출력 생성

설명하는 기술은 p형 차동 입력 쌍에만 적용됩니다.

전용 레퍼런스 분기는 피드백 루프에서 벗어나 안정성을 제공하며, 이는 불확실한 출력 커패시턴스 값에 매우 중요합니다.

면적 및 전력 절약을 위해 이 분기를 제거하는 옵션이 있으며, 시작 지연을 피하기 위해 다른 분기의 출력을 사용하는 것을 선호합니다.