all right, big big welcome to advancing AI 2024. Today, I'm super excited to launch our fifth gen epic portfolio. It all starts with our latest Zen 5 Core. We designed Zen 5 to be the best in server workloads, and that means delivering an average of 177% higher IPC than Zen 4 and adding support for full AVX 512. Turn is fantastic. It features up to 150 billion transistors across 17 chiplets, scales up to 192 cores and 384 threads, and one of the things that's very special about fifth gen epic is we actually thought about it from the architectural standpoint in terms of how do we build the industry's broadest portfolio of CPUs that both covers all of the new Cloud workloads as well as all of the important Enterprise workloads and things like you know building fifth gen epic CPU at 5 gz. That was because there was a new workload. We were seeing the need when you think about industry-leading performance for AI head nodes. That frequency becomes

really important, and that's an example of where we've brought in the portfolio with Turin. Now, this version of Turin is actually 128 cores, and it's optimized for scale-up workloads. It has 164 NM triplets, so if you look outside of the ring, you see the 16 4-nanometer chiplets and a 6-nanometer IO die in the center. And we've optimized this for the highest performance per core because it's extremely important in enterprise workloads. When you see that, you know, software is often licensed on a per-core basis, you want the highest possible performance per core. Okay, now this is also Turin. This is the 192-core version of Turin, and this guy is optimized for scale-out workloads. And here we use 12 3-nanometer compute chiplets, and it's the same 6-nanometer IO die in the center. And this version of Turin is really optimized for cloud, so applications that benefit from maximum compute per socket. This is what we do. So, let's now take a look at Turin.

performance. We're going to compare many of the things in the next few slides to the competition's top of Stack Emerald Rapids. When you look at the competition's top of Stack, a dual-socket fourth-gen Epic server is already 1.7 times faster on Spec Rank 2017. And with fifth-gen Epic, the performance is fantastic. We extend that lead with 2.7 times more performance. Now, we know it's a very competitive space, and we fully expect as our competition launches their next-generation CPUs and they ship in volume, that Turn will continue to be the leader for the Enterprise space. There are many commercial software stacks that are licensed for core, and CIOs want to optimize the cost by running solutions on the fewest possible cores. When running these workloads on-prem, again, fourth-gen Epic is already the performance leader, and with fifth-gen, we deliver 1.6 times more performance per core than the competition. That's 60% more performance with no additional licensing cost. Today, I'm very

excited to launch Mi 325x, our next Generation Instinct accelerator with leadership generative AI performance. Mi 325 again leads the industry with 256 gigabytes of ultra-fast HBM 3E memory and six terabytes per second of bandwidth. When you look at Mi 325, we offer 1.8 times more memory, 1.3 times more memory bandwidth, and 1.3 times more AI performance in both FP16 and FP8 compared to the competition. And when you look at that across some of the key models, we're delivering between 20 and 40% better inference performance and latency on things like Llama, MRAW, and MRAW. And importantly, one of the things that we wanted to do was really keep a common infrastructure. So, Mi 32 leverages the same industry-standard OCP-compliant platform design that we used on Mi 30. And what it does is it makes it very easy for our customers and partners to bring solutions to market. Now, when you look at the overall

platform with HPUs. We deliver significantly more AI compute and memory. The HPU version features two terabytes of HBM 3E memory and 48 terabytes per second of aggregate memory bandwidth, enabling our customers to run more models as well as larger models on a single MI 325 server. Today, I'm very excited to give you a preview of our next-generation MI 350 series. The MI 350 series introduces our new CDNA 4 architecture. It features up to 288 GB of HBM 3E memory and adds support for new FP4 and FP6 data types. And again, what we're thinking about is how can we get this technology to market the fastest. It actually also drops into the same infrastructure as MI 300 and MI 325 and brings the biggest generational leap in AI performance in our history when it launches in the second half of 2025. Looking at the performance, CDNA 4 delivers over seven times more AI compute and, as we said, increases both

memory capacity and memory bandwidth, and we've actually designed it for higher efficiency, reducing things like networking overhead so that we can increase overall system performance. In total, CDNA 4 will deliver a significant 35 times generational increase in AI performance compared to CDNA 3. We have been relentlessly focused on performance, from the latest public models to the flagship proprietary models. With each ROAM release, we've delivered significant performance gains. Our latest release, Rockham 6.2, delivers 2.4 times the performance for key inference workloads compared to our sixth Auto release from last year. These gains have been made possible by a number of enhancements: improved attention algorithms, graph optimizations, compute libraries, framework optimizations, and many, many more things. Similarly, ROAM 6.2 delivers over 1.8 times improvement in training performance, and again, these gains have been made possible by improved attention algorithms like Flash Attention V3, that is supported, improved compute communication libraries, parallelization strategies, and framework optimizations. The AMD Pensando team has now delivered the third generation P4.

engine featuring over 200 fully programmable match processing units, a bunch of table engines. What it means is a super high-performance, fully programmable data path engine that can deliver 400 gbits per second line rate performance while multiple Advanced Services run concurrently on top of that engine. These Services can be coded and changed at the speed of software while matching the performance of hardwired solutions. Selena offers 400 gigabits per second throughput while running SDN security encryption services simultaneously. It provides greater than 2x the performance of our previous generation while being fully backward compatible. And that fully programmable pipeline means we can continuously deliver innovations and features to our customers, and they can add their own innovation on top. Selena will power high-performance front-end networks for AI systems and meet the increased demands of general compute clouds that are powered by Turin CPUs that need to be fed some data. But I'm equally excited to announce AMD's Polara 400. It uses the same third-generation P4 engine to

enable what we expect will be the industry's first Ultra Ethernet Consortium ready AI Nick. It will deliver the performance benefits of UE ready RDMA and ensure that AMD's customers can continue to innovate at a rapid pace and achieve the fast time to production. The AMD teams, networking teams, are delivering extremely well, and I'm pleased to announce that Selena and Polara will both be available early next year. The AMD Ryzen AI Pro 300 series resets the bar for what a business PC can do. We combine our high-performance Zen 5 CPU, our new RDNA 3.5 Graphics, our new XDNA 2 NPU with 50 plus TOPS of AI performance, and all of this, this is within Co-Pilot Plus PCs.

AMD 'Advancing AI' Event: Everything Revealed in 9 Minutes

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