This is being evaluated as a masterpiece of the Intel Haifa Research Institute in Israel. However, in the case of Luna, Israel led the design from start to finish. It is said that the package power itself can be 50% lower, which means it was really designed with low power consumption in mind. Of course, they reduced the core count as well. Qualcomm's package power is much better, and it seems they are subtly saying, Let's target the high-end market; don't try to compete with us. But Intel didn't compare itself with them. 

Hello everyone, this is An Dae-gong from Engineering Error. These days, Intel's situation is quite concerning. There are rumors about selling its foundry, and there are talks of selling its FPGA division as well, amidst some financial issues. Operating profits are not coming through properly, and sales are in a complete slowdown. However, in the midst of all this, perhaps this news is genuinely a good one.

I would like to talk about the emergence of the fourth-generation laptop processor, codenamed Luna Lake. This is significant not just because a new generation has been released, but because it has surpassed the existing ARM processors that were dominating in terms of power efficiency. It has received evaluations stating that it has improved performance while also providing better power efficiency, effectively dispelling concerns about the decline of x86 power efficiency. According to Intel, the second version of the Intel Core Ultra will see its first laptop released on September 24. It boasts the fastest CPU core, the world’s best integrated GPU, and outstanding AI performance, all while offering a strong power-to-performance ratio. This means that the battery lasts longer while maintaining a good performance ratio. Originally, this was all in the realm of ARM, and there have been discussions about Qualcomm's comparisons in gaming, among other things, as mentioned in the previous video.

As I mentioned, Qualcomm has introduced the Snapdragon X Elite, aiming for better power efficiency with an ARM-based Windows system, promising significantly longer battery life. Now, with the launch of the Core Ultra Series 2, which boasts over 20 hours of battery life on laptops, they are catching up with competitors in terms of power efficiency. However, this raises concerns about Qualcomm's already existing compatibility issues. Let’s take a closer look at this situation. 

Previously, I organized information regarding Lunar Lake, but to summarize the overall context: In this generation, Apple has introduced the M3 chip using TSMC's 3-nanometer first-generation N3B process, followed by the M4 chip, which was first used in the iPad, utilizing the 27B N3E process. This second-generation process seems to have been designed to reduce manufacturing costs.

Anyway, both are made with a 3-nanometer process. In the meantime, the Snapdragon X Elite uses TSMC's 4-nanometer process, which corresponds to the 4-nanometer technology, but you can think of it as slightly older generation technology. As for AMD, they recently released the Ryzen AI 300, which was also made using the 4-nanometer process. So, only Apple is using the cutting-edge 3-nanometer process, while Snapdragon and AMD are produced using the 4-nanometer process. However, in the case of Luna Lake, Intel's core tiles were not made by Intel but by TSMC, which produced them using TSMC's 3-nanometer process. Therefore, when comparing Qualcomm's Snapdragon to AMD processors, the process is a generation ahead. In the past, when Intel's processes were lagging, they managed to catch up using that technology.

By using a process that is at or above a certain level, it is important to note that there were advantages in terms of power efficiency. Ultimately, Qualcomm jumped into the Windows market with the idea that if we use our technology, laptops will last a really long time. However, Intel has come out with a very good power efficiency in the x86 architecture, which seems to mock this. Of course, this is still Intel's claim, and we need to evaluate it once the laptops are actually released. Keep this in mind as we move on. Before I explain the details, please remember what I'm saying now. Intel, while using the complex x86 architecture, has a specific philosophy in its design to ensure power efficiency. Essentially, we commonly refer to our CPU cores as P-cores and E-cores, which stand for Performance cores and Efficiency cores. The Efficiency cores...

Now, the performance that processes with less power consumption is slightly improved, but that's the structure. So, between the eco and AI processing, components like the MPU are designed to handle lighter tasks, while more intensive tasks are activated using the Pico and the GPU for high-speed operations. Each is allocated accordingly. Previously, I mentioned Luna Lake, where we have divided the PMRC areas. By completely shutting down a tile or a specific area, we can drastically reduce power consumption. This way, Luna Lake can sufficiently showcase the performance of the ARM-based architecture. From an architectural standpoint, there’s nothing to be ashamed of. Looking at the efficiency of the eco MPU and the high performance of the GPU in this Luna Lake, it is completely separated, similar to how Apple initially divided roles with Firestone and Ice Storm.

I implemented the separation of roles in x86, and since it works properly, we can consider this event as providing a new perspective in the debate between x86 and ARM. Now, let's take a look at a demonstration before we analyze the complex details. First, we have the GPU ES, which features the latest graphic architecture, XA2. It is labeled as FS Tist Gaming and Light. The red bar represents AMD, and while AMD has some higher performance levels, you can see that Intel generally outperforms them significantly. Now, the purple bar represents Qualcomm, and it shows that it doesn't perform well with 23 games. Qualcomm's performance is so poor that games won't even run. This is quite provocative, suggesting that while you're running Windows on ARM, you can't even implement those games. Qualcomm is claiming to be 68% better, which is quite a bold statement. Clearly, Intel has made significant strides this time.

TSMC's 3nm process is currently utilizing a dual-path strategy. This means that it is not significantly delayed while using KSMC's top-tier process to optimize performance and power efficiency. As you can see, this technology is yielding excellent results, and we can make direct comparisons. It clearly demonstrates that we perform better. Of course, they might have selected the best cases to showcase, but they can confidently assert that their results are superior.

However, we still need to test whether everything is consistently good. I just explained this in terms of GPUs, but let's take a look at the chip. It appears quite small. Inside that tiny chip, do you see the DDR integrated? The DRAM is already embedded. What does this mean? You can upgrade the RAM through this chip in your laptop.

There is no option for us to choose the specifications when ordering something like an Apple MacBook; we have to decide from the beginning how many gigabytes we want. This is because the memory is embedded directly into the chip, which is a fundamental aspect of its design. This architecture is regarded as a masterpiece developed by Intel's Haifa research center in Israel. Originally, Intel's research efforts were spread between the Haifa center in Israel and their North American facilities, with each contributing to development in turns. However, in the case of the Luna chip, it is said that Israel led the design from start to finish. In the Meteor project, they created a system using four tiles combined into one base tile, totaling five tiles. This time, they also used a tile structure, but it appears to be somewhat simpler. There is a computer tile, and it creates TSSS, and then the platform.

There is a separate controller tile, and it structurally supports various tiles, all of which include CPU, GPU, and MPU. Memory control is also fully integrated, meaning that the memory is all embedded within so that everything can be controlled from there. However, most of it was entrusted to TSMC. They handled the interconnects for the die, while they also managed the interposer connections themselves. If you look at the side, you can see how the memory is positioned within the entire chip. They used LPDDR5X, which allows them to reduce the overall size and minimize the physical distance that data needs to travel. This way, they can also save a lot of power. Here, the components that correspond to the computer tile include most of the main computing elements: CPU, GPU, MPU, and memory controllers, all of which are encompassed in the computer tile.

There is a platform controller tile below, and the computer tile is about 140 mm squared, while the phone controller tile is around 450 mm squared. This uses the TSMC N6 process, while the N3B process is used for the other components. In simple terms, it incorporates things like PCI Express, USB, Thunderbolt, Wi-Fi 7, and Bluetooth, all into this system. They connect everything through a base tile that is laid out underneath. The base tile itself is made using Intel's 22 FF process, and it utilizes silicon interconnects for the forest die-to-die interconnects. Intel is also known for its expertise in packaging. Therefore, there are discussions about how, due to TSMC's capacity issues with NVIDIA GPUs, many are now entrusting their work to Intel.

기본적으로 포베로스, TSMC, 코버스 링크는 비슷한 기술을 가지고 있습니다. 이들은 2.5D와 3D 칩의 구조에 관련된 패키징 기술입니다. 메모리를 칩 바로 옆에 연결하여 붙이기 때문에, 패키지에서 신호를 구동하고 마더보드를 거치는 것보다 전력 소모가 훨씬 적습니다. 실제로도 내부에서 신호를 주고받을 때 가장 적은 레이턴시를 제공합니다. DRAM 레이턴시도 100 이하로 줄어들어, 기존의 메테어 레크라나 AMD 스트릭스 포인트와 비교했을 때 30%에서 40%까지 크게 낮아진 것을 확인할 수 있습니다. 이러한 점에서 레이턴시가 크게 개선되었다고 볼 수 있습니다. 가장 특이했던 점은 하이퍼스레딩이었습니다.

Apple has now stopped further support, and it's like they're moving towards reducing the number of CPU cores, using only four cores. So, instead of focusing on overall performance, they have been promoting the fact that the performance per thread is very good. Previously, there were only two threads, but now there are only eight, which is a significant reduction. Later, when I show you the performance comparison, I will emphasize the performance per thread. As you can see, this is the Sky Munt Drive, and IPC, or instructions per clock, indicates how much the cores have improved. I always mention how many instructions can effectively be executed in one clock cycle when a command is actually thrown, and that has increased by 68%.

It seems that there has been significant improvement. A lot of attention was given to this core, and later, it will be incorporated into Intel's server, CR Forest, which is designed to be a very power-efficient server. It appears that this was also implemented to respond to AMD's server targets. In the case of the core, Lion Cove introduced a new cache. Originally, there were L1, L2, and L3 caches, but they have now added an L1.5 cache between L1 and L2, greatly increasing the cache capacity. This aims to enhance branch prediction, processor parallelism, and speed by reducing latency. Particularly, in the previous generation, Meteor Lake had two Crestmont cores and 2 MB of L2 cache, but now, even this core has increased to two or four Skylake cores, along with the L2 cache.

You can see that the size of the cache has increased significantly. We were running the Eco on these two Crest Montraux tiles, but when that didn't work, we targeted Pico for scheduling. However, that didn't go well either. So, instead of creating a low-power Eco, we decided to create a separate low-power island, which allows us to turn everything off completely. This makes power management much easier. 

As I mentioned earlier, initially, we were running a completely low-power Eco within the SOC. If that became too congested, we would then run the Eco on the computer tile, and if that didn't work either, we would switch to Pico. In practice, this scenario isn't often used; we typically just stick with Eco, and if that fails, we move to Pico. It’s a simpler structure. Additionally, regarding Eco and MPU...

To enhance the somewhat lacking performance, additional cache has been implemented. This means that we are using Eco and M for the purpose of reducing power, allowing us to turn the power on and off as needed. If not in use, power is not supplied to that area. We decided to run Pico only when it's necessary, and as a result, we have caught up with the power efficiency of ARM. 

If we look at the actual performance, you will see that we added side cache as mentioned earlier, allowing each part to process more efficiently. Instead of simply expanding RAM, we made choices aimed at reducing power consumption. It appears that the package power itself can be reduced by 50%, indicating that it was specifically designed for low power consumption. Of course, this was achieved by reducing the number of cores as well, so making these choices must not have been easy, especially at the Israeli research institute.

From the very beginning, it seems that we have taken a proactive approach, making decisions with a completely different structure. If you use Qualcomm's Snapdragon X Elite, there are definitely limitations with the program; some functions simply do not work, or they are slow. There are still many features that do not function well with AMD, so if we can secure an advantage in performance and power, there would be no reason to buy Qualcomm's products. Compared to the previous generation, power consumption has decreased by 50%, the performance of the P-core has improved by 14%, and the E-core performance has more than doubled. This means that battery life can now reach up to 10.1 hours, which is two hours longer than Qualcomm's Snapdragon X Elite and four hours longer than AMD's. Therefore, it is reported that energy efficiency has improved twofold. You can see this comparison directly; the purple line represents Qualcomm, and this is compared to the Ultra 7.

Compared to the Ultra series, the performance level is sufficiently high or even higher. However, Qualcomm's package power is significantly better. Of course, we need to consider how power and usability may vary overall, but if we focus on Qualcomm, it seems to be sending a message like Don't even try to compete with us. Additionally, as emphasized, the core count has decreased, so we looked at the performance per thread. Each thread shows a significant increase in performance, up to two to three times—2.6 times more consistently based on power—compared to Meteor Lake. This indicates that lightweight laptops, especially budget laptops, can deliver quite good performance, showcasing their potential in various aspects.

When we make this comparison, we see the test results, and there are significant differences. Of course, they must have shown the comparisons where there are substantial discrepancies. In the case of Microsoft Teams, the differences are minimal, but we still assert that we are superior. As for Office productivity, the results show that our performance is over 50% higher. Qualcomm, on the other hand, struggles with gaming, reporting fewer than 23 games available, and they are still facing compatibility issues. Given that our battery life lasts longer than theirs, I imagine Qualcomm must have been quite surprised by these results. However, Intel did not compare with Apple. It seems they could have compared with the M3, especially since Qualcomm did make comparisons with it. But now that the M4 has come out, comparing with that might be a bit tricky.

I wonder if it was burdensome, but anyway, Intel is really struggling right now. However, it seems like they have managed to produce something decent, which makes me think they still have some design capabilities. Various chips are being introduced with different specs, most of which have a TDP of 8W to 77W. In the high-end category, there is the Core Ultra 9 288VF model. The maximum turbo power consumption can suddenly spike to 37W, allowing for some flexibility in design. Lastly, we cannot overlook AI performance. Intel has emphasized comprehensive AI performance for a long time. Ultimately, they claim that by integrating CPU, GPU, and MPU, we can support 120 TOPS. The GPU is responsible for calculations, including dense vector matrix math, while the CPU handles different units, although they all have slightly different functions.

So, it's not something we can just look at the same way. Intel has been emphasizing that, in the case of Luna Lake, balancing the various components and providing overall support will ultimately be effective. This can vary depending on how AI models change and how they are utilized, but fundamentally, the MPU itself has also come out quite strong. Other GPUs and CPUs should be able to cover the necessary areas, so I think Intel is trying to enhance its position to maintain its dominance in the Windows ecosystem. One of the biggest issues that has held Intel back has been product launch delays. If the Ponte Vecchio GPU had been released on time, it could have been competitive. However, before even having a chance to compete, NVIDIA released the H100, so there was no opportunity for a showdown.

There were issues with the CPU, such as the Sapphire Rapids, which have been delayed. While there might have been design problems, ultimately, it seems that manufacturing issues have arisen. Currently, there are various discussions about Intel's foundry. For instance, Broadcom's ES core was unable to receive approval, which has prevented them from operating the foundry. However, by entrusting important tasks to ITMC, they are trying to reduce the risks associated with production support. Since Intel is still somewhat ahead in the laptop market, it seems they are trying to maintain their leadership. As for performance, when the first laptop is released on September 24, many tech YouTubers will provide insights, and I will also take a look at any interesting content. I would like to reintroduce my Instagram, and I often post updates on YouTube.

I'm posting short and interesting things that are a bit difficult to share. The Instagram account is called Untact Error, and there are many fascinating things there. This one is an AI learning example, but it seems it couldn't understand breakdancing. So, it looks quite bizarre. I'm uploading a lot of these kinds of things, so it would really mean a lot if many people could follow me. Until now, this has been Anbae Engineering.

x86 최초 ARM 전성비를 이겼습니다 | 퀄컴, AMD AI 칩을 압살한 인텔 루나레이크 본격 출시 | 무너져가는 인텔의 한 줄기 희망

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